Porting from Wishbone Bus to Avalon Bus in SoC Design
Xu Xing, Chen Zezong, Jing Hua Jiang, Ke Hengyu · 2007
Motivated by the increasing IP (intellectual property) based SoC (system-on-chips), designers have begun using an IP based SoC design methodology that permits reuse of key SoC functional components. The Wishbone bus is a common interface between IP cores, and the Avalon interface is designed to accommodate peripheral development for the SoC environment. It is necessary to port the Wishbone bus to Avalon bus when we use an IP core with a Wishbone interface in an Avalon bus system. We port the Wishbone interface I2C controller IP to Avalon bus and design a master/slave simulation model to test the Avalon bus compatible I2C controller IP core. The experimental results confirm that the Avalon bus compatible I2C controller IP works well in the Avalon based SoC.