An architecture for a video rate two-dimensional fast Fourier transform processor
G. Taylor, Randy H. Steinvorth, John F. McDonald · IEEE Transactions on Computers · 1988
A description of an architecture capable of computing two-dimensional fast Fourier transforms on a 256*256 pixel image at a rate of 30 images per second is presented. The architecture consists of a small number of basic building blocks which may be repeated to yield any desired performance. To achieve video rate performance, 16 butterfly processors, arranged as four coupled clusters of four processors each, and nine working memories are required. Because of the parallelism and pipelining used in the design, the system clock needed to achieve this high level of performance is only 240 ns.>