NIOS II processor implemented in FPGA: An application on control of a PFC converter
Andre L. P. Alcalde, Marcio S. Ortmann, Samir Ahmad Mussa · 2008
This paper presents an application study in power electronics of the NIOS II processor, provided by ALTERA to be implemented in FPGA. The FPGA has the capability of parallel processing and hardware modification. It offers the possibility of microprocessor implementations, which can be programmed in assembly or C. The NIOS II is a versatile embedded processor family that presents high performance and has been created for FPGA. The NIOS II Processor propitiates flexibility in the implementation of the processor system such an as: choose the exact set of CPUs, peripherals, and interfaces needed for the application; increase performance without changing your board design, accelerating only functions that require it; eliminate the risk of processor obsolescence; lower overall cost, complexity, and power consumption combining many functions into one chip. The focus of this paper is on the use of this processor applied to the digital control of a single-phase PFC rectifier, evaluating the advantages and disadvantages of the use of this technology.