Air-Gap Application and Simulation Results for Low Capacitance in 60nm NAND Flash Memory
Sukjoong Kim, Wheewon Cho, Junggeun Kim, Byungseok Lee, Sung‐Ki Park · 2007
In IMD study Rs reduction and better uniformity as well as lower capacitance were achieved in 60 nm 2 Giga Bit NAND flash memory. It alos fabricated 70 % air-gap of gate and calculated interference reduction in 45 nm device when it was applied throughout simulation. It is sure that we should apply this air-gap process to future device in order to meet device property of cell Vt shift and capacitance.