Design of an application specific VLSI chip for image rotation
Indradeep Ghosh, Bandhan Bandhu Majumdar · 2002
Design of an ASIC chip for on-line rotation of a digital image is reported here. A CORDIC based scheme has been used to compute the displacement of a pixel. In order to achieve high throughput, the complete image frame is divided into windows and a combination of parallel and pipeline architectures has been developed to compute the rotation of individual windows and for computing the final displacement. The chip offers real time rotation of 512/spl times/512 pixel image, with a clock frequency greater than 10.6 MHz. The estimated chip area is 211/spl times/276 mils/sup 2/.>