Software verification and validation within the (rational) unified process

Christopher Fuhrman, F. Djlive, Edgardo Palza · 2004

We discuss the integration of software verification and validation activities (as defined by the IEEE Std. 1012) within the unified process. We compare and contrast these two process frameworks, and identify the aspects of verification and validation that are directly supported, partially supported or not supported by the unified process.

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