Design of random pattern testable floating point adders
Janusz Rajski, Jerzy Tyszer · 2002
The paper presents a floating point adder with enhanced testability and test response compaction capabilities. It is shown that the testability of the conventional adders can be improved by changing the functionality of some of their internal modules in the testing mode. It is also demonstrated that the floating point units can perform an efficient test response compaction in a built-in self test environment.>