An equalizing and channel coding processor for GSM terminals
Michio T. OKAMOTO, Takashi Ishikawa, S. Marui, M. Yamasaki, K. Ueda, N. Asano, Masayuki Uesugi, Yosibumi Saitoh, Y. Fujimoto, Shigeyuki Furushima · 2002
A new DSP architecture for equalizing, channel coding/decoding and encryption/decryption required by GSM hand portable terminals is presented. In the DSP, called EQCHAN (equalizer and channel coding/decoding processor), these tasks are managed in common units, that is, the data processing unit (DPU) and the bit manipulation unit (BMU). The LSI that contains EQCHAN was designed using 0.8 /spl mu/m CMOS technology and its die size is 123 mm/sup 2/. The power consumed in the LSI is 60 mW at 3.6 V under a continuous communication mode and this value is sufficient for a portable terminal. We describe the detail architecture of EQCHAN.