A new residue adder with redundant binary number representation
Shugang Wei · 2008
In this paper, we present a modified addition algorithm modulo m with a signed-digit(SD) number representation where m = 2n−1, 2nor 2n+1. To simplify an SD full adder, new addition rules are proposed for generating the intermediate sum and carry with a binary number representation. By using the new codes for intermediate sum and carry and the end-around carry architecture, the proposed modulo m addition requires less hardware and short delay time for the residue addition than previous methods. Compared to previous work, the circuit area and delay time are improved by 21% and 30%, respectively.