STOIC: state assignment based on output/input functions
Irith Pomeranz, Kwang-Ting Tim Cheng · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1993
A finite-state-machine (FSM) synthesis procedure, specifically aimed at using primary inputs and primary output functions as state variables, is proposed. The number of next-state functions that have to be implemented is thus reduced, potentially reducing the area of the synthesized circuit. Also, as more of the state variables are directly observable (the primary outputs used as state variables), and directly controllable (the primary inputs used as state variables) the testability of the implementation is increased. Experimental results are given to demonstrate the effectiveness of the procedure in reducing area.>