Test pattern generation for timing-induced functional errors in hardware-software systems
Srikanth Arekapudi, Fei Xin, Jinzheng Peng, Ian G. Harris · 2002
We present an ATPG algorithm for the covalidation of hardware-software systems. Specifically, we target the detection of timing-induced functional errors in the design by using a design fault model which we propose. The computational time required by the test generation process is sufficiently low that the ATPG tool can be used by a designer to achieve a significant reduction in validation cost.