Theory and VLSI implementation of multilevel median filters
Gonzalo R. Arce, P Warter, R.E. Foster · 2003
The properties of multilevel median filters are summarized, and a detailed analysis of their efficient implementation is given. In particular, a bit-serial compare/exchange module is described. This module is then used as the building block of a systolic array for the efficient implementation of these two-dimensional filtering algorithms. The architecture described yields a low area complexity, which allows a single chip VLSI implementation.>