Using multibooting approach to reduce the FPGA device utilization and to create a redundant system
Khalil I. Arshak, Christian Serge Ibala · International Conference Mixed Design of Integrated Circuits and Systems · 2008
As electronic system becomes more and more complex design and verification time of the FPGA device increase exponentially. The volatile characteristics of the FPGA can cause configuration loss due to electrical conditions such as electrostatic discharge or power failure. Our paper will present a new approach to decrease the design complexity and verification time while also reducing the time to market and create a redundant system in case of configuration loss. The Spartan3A board which include a SPI (Serial Peripheral Interface) FLASH, an ICAP (Internal Configuration Access Port), and an ISE 9.2. (Integrated Software Environment) Software tool from Xilinx will be used to achieve that goal.