Buffer length impact to 32x32 crosspoint queued crossbar switch performance
Milutin Radonjić, Igor Radusinović · 2010
Crosspoint queued switch architecture is recently actualized, since modern technology enables an easy implementation of large buffers in crosspoints. An advantage of this solution is the absence of control communication between linecards and scheduler. Performance analysis of crosspoint queued switch with 32 ports is presented in this paper. Four algorithms are used for scheduler implementation: longest queue first, round-robin, frame based round robin matching and random. Throughput, average cell latency and loss probability are evaluated under uniform and various nonuniform traffic patterns. Results show that longest queue first algorithm has best performance in most simulated cases. It is also shown that implemented algorithm has not any influence to switch performance if buffers are long enough.