An IDDQ-fault location scheme
Tsin‐Yuan Chang, Weihong Chen · 2002
In this work, an IDDQ fault location scheme is proposed and implemented in a chip to locate a single faulty branch (either a VDD branch or a GND branch or both) with a three-pattern test by using a hardware approach, which can be applied to the redundant VLSI structure for yield enhancement in the repairable design. The fault model includes IDDQ fault with or without single stuck on/off fault in the added transistors. The yield analysis of the proposed scheme is also presented.