Complexity comparison of multistage interconnection networks for broadband switching application
Giovanni Emanuele Corazza, Carla Raffaelli · 2002
A criterion to compare broadband switching architectures is described. Input/output-buffered architectures are investigated and their complexity is evaluated in terms of the number of equivalent gates required for implementation. Comparisons are performed assuming the same input load and packet loss probability for all the networks examined, and sizing the input and output buffers by means of an analytical model to obtain these conditions. Areas are outlined indicating the cheapest network in relation to prefixed operating conditions. Results show that replicated networks, with suitable values of the replication factor, represent interesting solutions both in performance and in an economic perspective.>