A 250 MHz shared-resource VLSI test system with high pin count and memory test capability
S. Kikuchi, Y. Hayashi, Takaaki Matsumoto, R. Yoshino, Ryuichi Takagi · 2003
The authors describe a 250-MHz, 2048-pin, shared-resource VLSI test system which has timing accuracy up to 300 ps and a parallel algorithmic pattern generation system for embedded memory testing. A timing generation system which provides an effective deskewing scheme in a shared-resource tester is proposed. Parallel pattern generation for high-speed memory testing is introduced, and a conversion strategy for parallel programs is discussed.>