Specification of timing constraints for controller synthesis
Rumi Zahir, Wolfgang Fichtner · European Design Automation Conference · 1991
For controller synthesis to be successful, detailed knowledge of the timing constraints of the system under synthesis is essential. The authors present a method for extracting timing constraints from a behavioral description, architectural restrictions, component timing requirements and protocol specifications. The timing constraints are combined in a timing constraint graph that can be solved in polynomial time using algorithms known from symbolic layout compaction. >