The realization of the Negative Logarithmic Function based on FPGA
Ruan Wei-hua · 2011
This paper presents the realization of the Negative Logarithmic Function based on the FPGA chip EP2C5T144 by QuartusII software. It is designed a sequential circuit by the interpolation method and its' fast clock frequency can arrive 400 MHz. It's very good that the result of the hardware test by SignalTap II.