ANN digitally programmable analog synapse
M. Al-Nsour, H. Abdel-Aty-Zhody · 2003
An Artificial Neural Network (ANN) synapse with local digital weight storage capability is presented. It utilizes a novel, compact, voltage mode multiplying digital-to-analog converter to perform multiplication between an analog input and a digital weight. A 6-bit signed weight synapse chip has been implemented in VLSI through MOSIS 1.2 micrometer n-well CMOS technology. It occupies a total area of 1.35 mm/sup 2/. With +3 Volts supply, the circuit accepts analog inputs within /spl plusmn/1 V. Output is also within /spl plusmn/1 V. Maximum power consumption is 20 mW and total error is less than 3%. Circuit analysis and performance evaluation is presented.