A CAM/WTA-Based High Speed and Low Power Longest Prefix Matching Circuit Design
R.-J. Tsai, Hsin-Wen Ting, Chi-Sheng Lin, Bin-Da Liu · 2006
In this paper, we propose a novel content addressable memory/winner take all-based longest prefix matching (CW-LPM) circuit for the network router application. This CW-LPM circuit not only provides a simple hardware-based solution without some traditional drawbacks such as reordering or unavoidable complex extra hardware, but also has features of low power, low cost, high search speed and scalability. We implemented this CW-LPM circuit by using the TSMC 0.18 mum 1P6M CMOS process with 128 words by 32 bits data configuration. The simulation results show that the proposed CW-LPM circuit works up to 250 MSearches/sec at 1.8-V supply voltage with power consumption of 6.89mW and 140 MSearches/sec at 1.25-V supply voltage. Consequently, the proposed CW-LPM circuit design meets the speed requirement of OC (optical carrier) -3072/160 Gb/s line rate multi-gigabit/sec Ethernet network