COBRA: an 1.2 million transistor expandable column FFT chip
G. Sunada, J. Jin, Martin Berzins, T. Chen · 2002
This paper presents an optimized column FFT architecture which utilizes bit-serial arithmetic and dynamic reconfiguration to achieve a complete overlap between computation and communication. As a result, the system can compute a 24-bit precision 1 K point complex FFT transform within 9.25 /spl mu/s, far surpassing the performance of any existing FFT systems.>