A Hardware-Efficient Pattern Matching Architecture Using Process Element Tree for Deep Packet Inspection
Seongyong Ahn, Hyejeong Hong, Hyun Jin Kim, Jin-Ho Ahn, Dongmyong Baek, Sungho Kang · IEICE Transactions on Communications · 2010
This paper proposes a new pattern matching architecture with multi-character processing for deep packet inspection. The proposed pattern matching architecture detects the start point of pattern matching from multi-character input using input text alignment. By eliminating duplicate hardware components using process element tree, hardware cost is greatly reduced in the proposed pattern matching architecture.