Hybrid NOrec
Luke Dalessandro, François Carouge, Sean White, Yossi Lev, Mark J. Moir, Michael Lee Scott, Michael Spear · 2011
Transactional memory (TM) is a promising synchronization mechanism for the next generation of multicore processors. Best-effort Hardware Transactional Memory (HTM) designs, such as Sun's prototype Rock processor and AMD's proposed Advanced Synchronization Facility (ASF), can efficiently execute many transactions, but abort in some cases due to various limitations. Hybrid TM systems can use a compatible software TM (STM) in such cases.