Fine-Grained Power Control Using A Multi-Voltage Variable Pipeline Router
Takeo Nakamura, Hiroki Matsutani, Michihiro Koibuchi, Kimiyoshi Usami, Hideharu Amano · 2012
We propose a Multi-Vdd Fine-Grained Variable Pipeline (MVFG-VP) router in order to reduce power consumption of Network-on-Chips (NoCs) designed for many-core processors. MVFG-VP router adjusts its pipeline depth (i.e., communication latency) and supply voltage level of each input and output channel independently. Unlike Dynamic Voltage and Frequency Scaling (DVFS) routers, MVFG-VP routers share the same operating frequency, and thus there is no need to synchronize neighboring routers working at different frequencies. The proposed power management policy makes the supply voltage of each input and output channel low whenever the channel is idle. A MVFG-VP router is designed by using a 65nm process and evaluated using a full-system CMP simulator. Evaluation results show that the power consumption is reduced by 33.6% while the performance overhead is only 4.4% compared to a conventional router. In addition, the fine-grain power management approach is compared to a coarse-grain power management (for a Multi-Vdd Coarse-Grained Variable Pipeline router: MVCG-VP router) that simply controls the supply voltage of a whole router. The results show that fine-grain and less energy overhead approach reduces the power consumption by 16.6% compared to the coarse-grain approach with the same application performance.