A CMOS Batcher and Banyan chip set for B-ISDN packet switching
W.S. Marcus · IEEE Journal of Solid-State Circuits · 1990
A Batcher and Banyan chip set suitable for broadband packet switch applications is described. Each chip concurrently processes 32 bit-serial packet channels and is a building block for larger networks. Current chip samples have been tested at channel rates of 170 Mb/s in 1.2- mu m double-metal single-poly CMOS for both the Batcher and Banyan chips. Each chip requires a 5-V supply, dissipates approximately 1.5 W, provides 5.44 Gb/s of switching capacity, can process 12.8 million asynchronous transfer mode (ATM) cells per second, and is packaged in an 84-pin leadless ceramic chip carrier (LCCC) for convenient testing. The design and implementation of the switching elements capable of supporting the high-speed bit-serial channels and the chip architectures that accommodate them are described in detail.>