A Software Transformation For Pipeline Specification And Its Application To High-level Synthesis
Chia-Jeng Tseng · 1992
This paper presents an innovative method for transforming a nonpipelined behavioral specification into a pipelined one. The resultant behavioral specification is a succinct representahon for pipelined architecture, which can he input to a conventional micro-architectural synthesis system to produce a pipelined hardware implementation. The transformation is very versatile that it can handle straight line codes as well as behavioral descriptions with conditional branching and concurrent fork control constructs. Given a scheduled non-pipelined description, the latency is used as a parameter for producing the desired pipelined description. The transformation can generdte pipelined descnptions of fixed latency as well as variahle latency. The theoretical foundation for the transformation and the issues of pipeline validation are dscussed in detail. An example is introduced to illustrate the transformation. Expenmental data on a descnption of a fifth-order elliptic filter are presented and analyzed.