Multipath Interference Canceller and Chip-Level Equalizer for Satellite High Speed Downlink Packet Access (S-HSDPA)
Azızul Azizan, Atta Ul Quddus, B.G. Evans · 26th International Communications Satellite Systems Conference (ICSSC) · 2008
This paper presents the link level performance of a multipath interference canceller and a linear chip-level Griffith’s equalizer as advanced receivers for S-HSDPA in S-UMTS and SDMB systems. The S-HSDPA signals are transmitted from a GEO satellite via the highly dispersive multipath fading IMR channel to the UE. The severe multipath fading resulting due to time shifts of the replicas of the synchronous downlink chip stream decreases the orthogonality between spreading signatures. Interference cancellation and equalization are two techniques that can be applied at the receiver as an alternative to the conventional matched filter receiver. The results presented here highlight the advantages of the low complexity Griffith’s equalizer over the MPIC. The Griffith’s equalizer also shows robustness to CPICH channel estimation with negligible degradation of performance. Interestingly, the multipath interference canceller performs better than the RAKE receiver only at high values of power allocation.