VLSI design of on-line add/multiply algorithms
A. Skaf, Alain Guyot · 2002
We present some VLSI structures suitable for online arithmetic embedded algorithms using a radix-two fixed point signed digit system. As an application, we present online add/multiply architectures allowing the obtention of a zero-delay operator. An example of a circuit for online computation of several real functions using polynomials is also discussed.>