A layered adaptive verification platform for simulation, test, and emulation
Martin Zambaldi, Wolfgang Ecker, Renate Henftling, M. Bauer · IEEE Design & Test of Computers · 2004
This adaptive architecture for structuring testbenches accommodates various models of a design, from transaction to silicon. Moreover, the adapter-based architecture supports the execution of design models on different simulators (high level, RTL, gate level, and switch level), hardware emulators (the testbench runs entirely on the emulator), and even testers. Here, we present a modular, layered testbench (MLTB) approach to building a testbench. This approach is similar to platform-based design. It consists of a generic testbench kernel (TBK), connected through a bus to testbench elements. Our verification platform also satisfies another meaning of platform: a set of connected tools or a powerful tool environment, normally with an attached database, that acts as a platform for verification.