Scaling Challenges in NAND Flash Device toward 10nm Technology
Seokkiu Lee · 2012
The scaling of floating gate cell has been the key driving force in NAND flash market growth over the past two decades. However, the scaling of conventional floating gate technology below 20nm is looking to be very difficult due to some physical and electrical issues. Critical issues of scaling in NAND flash memory technology below 20nm are reviewed. The possible solutions for overcoming scaling challenges are introduced. With these solutions, floating gate NAND flash cell could be shrunk down close to 10nm dimension.