Integrated circuit for Hamming neural net
Felipe Gomez-Castaneda, Jose Antonio Moreno-Cadenas · 2002
The authors describe a CMOS integrated circuit in 2-micron, n-well technology for performing the parallel analog computation of a specific Hamming neural net. This electrical network supports a full digital feature at its output terminals derived from a self excitatory mechanism in the competing WTA units. Details are given of the transient response by PSpice simulations.