A longest prefix match search engine for multi-gigabit IP processing
Masayoshi Kobayashi, Tutomu Murase, A. Kuriyama · 2002
We propose an IP forwarding table search engine architecture, VLMP (vertical logical operation with mask-encoded prefix-length), for routers with multi-gigabit/sec speed links. We discuss the existing approaches and the requirements for search engines, and go on to propose VLMP search engine architecture that expands upon a content addressable memory (CAM) and can perform wire-speed packet processing of an OC-192 (9.6 Gb/s) link. In this architecture, prefixes can be stored in arbitrary order, while existing ternary CAMs require prefixes to be stored in the order of their lengths. Also presented is a newly developed search LSI in which the architecture is implemented.