A graph compaction approach to fault simulation
Dov Harel, Balakrishnan Krishnamurthy · Design Automation Conference · 1988
The authors describe a graph-compaction-based algorithm for fault simulation in combination circuits. The algorithm consists of reducing the circuit graph by repeatedly removing nonreconvergent vertices. The algorithm has been implemented in Smalltalk and preliminary experimental results are presented. A version of the algorithm outperforms all known fault simulation algorithms on a family of hard circuits. >