Improving the Efficiency of Static Compaction Based on Chronological Order Enumeration of Test Sequences
Irith Pomeranz, Sudhakar M. Reddy · Asian Test Symposium · 2002
Chronological order enumeration is a static compaction procedurefor synchronous sequential circuits that to-date producesthe shortest test sequences overall for benchmark circuits. Thechronological order enumeration procedure was not meant tocompete in computational complexity with the highly-efficientrestoration based compaction procedure. Rather, it wasdeveloped so as to provide a more aggressive target for static anddynamic test compaction procedures. Nevertheless, we describein this work several algorithmic methods to improve theefficiency of compaction based on chronological order enumeration.These improvements reduce the run time of chronologicalorder enumeration significantly using the same basic implementation.With these improvements, chronological order enumerationis shown to be faster and more effective than restorationbased compaction for sequences produced by an ATPG thatalready uses restoration based compaction as part of the test generationprocess. For uncompacted sequences, restoration basedcompaction followed by the improved chronological orderenumeration process is shown to be an effective combination.