Implementing a complex FIR filter on a novel parallel DSP architecture
Adrian Grigore, Radu Pralea, Andrei Alexandru Enescu · 2013
The current paper describes a novel high-parallel architecture of a DSP (Digital Signal Processing) core and depicts optimizing techniques for implementation using the affiliated compiler. A demonstrative benchmark is presented for a FIR (Finite Impulse Response) complex filter, emphasizing differences over known digital signal processors.