Development and architecture of second generation 6 chip MUSE (HDTV) decoder
K. Kohiyama, M. Ohta, Hiromasa Takahashi, Koichi Ogawa, Y. Otobe, M. Kurita, F. Asami, Nao Tahara, K. Sugihara · IEEE Transactions on Consumer Electronics · 1992
The architecture of a six-chip MUSE (HDTV) LSI family which decodes MUSE video and audio signals is presented. With this architecture, the number of components can be reduced to a fifth of former levels. Because entire MUSE functions were integrated entirely onto the chips, improvements of various functions can be made chip by chip, ensuring a long life span for the LSI family as a whole.>