An area/time-efficient motion estimation micro core
S.-G. Chen · IEEE Transactions on Consumer Electronics · 1993
An efficient microarchitecture for motion estimation is proposed. It achieves better time and area performance than the existing structures. Through pipelining and effective manipulation of two's-complement arithmetic, the adder complexity is kept to its lowest, while speed for a combined subtraction, absolution, and accumulation operation is made as fast as a carry-save addition. Together with a new DCT (discrete cosine transform) algorithm, the microstructure is further expanded and tailored to facilitate efficient execution of other video operations, such as DCT and filtering operations.>