Built-in self-test for GHz embedded SRAMs using flexible pattern generator and new repair algorithm
Shohei NAKAHARA, Keiichi Higeta, Makiko Kohno, Tatsurou Kawamura, K. Kakitani · 2003
This paper presents a built-in self-test (BIST) scheme, which consists of a flexible pattern generator and a practical on-macro two-dimensional redundancy analyzer, for GHz embedded SRAMs. In order to meet the system requirements and to detect a wide variety of faults or performance degradation resulting from recent technology advances, the microcode-based pattern generator can generate flexible patterns. A practical new repair algorithm for the Finite State Machine (FSM)-based on-macro redundancy analyzer is also presented. It can be implemented with simple hardware and can show fairly good performance compared with conventional software-based algorithms.