F-Timer: dedicated FPGA to real-time systems design support
Antonio Marcos Parisoto, A.A. de Souza, Luigi Carro, M Pontremoli, Carlos Eduardo Pereira, A. Suzim · 2002
This paper presents a hardware architecture and its FPGA implementation for real-time operating systems support. Dedicated hardware units are responsible for the maintenance of a 32 tasks list organized by time priority. The co-processor also communicates with the microprocessor to program interrupt modes and tasks. This dedicated HW architecture was easily prototyped in modern FPGAs, being a cost-effective solution to free microcontrollers from the burden of task time management. The FPGA has been completely synthesized based on a HDL description, allowing its use as a macrocell in larger designs. The task resolution is of 100 /spl mu/s.