A digit-serial compiler operator library
Richard I. Hartley, Peter F. Corbett · 2003
The PARSIFAL compiler is conceived for higher-throughput applications, allowing chips to be designed with throughput sample rates of up to 30 MHz, containing 300-400 MOPS on a chip of moderate size (250-mil/sup 2/). Details are presented of the library of digit-serial cells used to implement arithmetic operations on digit-serial data. A description is given of the design of digit-serial addition/subtraction, multiplication, and shifting cells, and it is indicated how division can be carried out. The multiple precision and staggered-digit data formats are described. These formats allow greater precision and higher throughput to be achieved when needed.>