A Software Radio Implementation of CDMA2000 1xEV-DO on a Single DSP Chip Designed for Mobile Handset Terminal
Shingo Watanabe, Yoshio Kunisawa, Daisuke Kamisaka, Takashi Inoue, Yoshio Takeuchi · IEEE Vehicular Technology Conference · 2006
The traditional software defined radio (SDR) implementations use either a high-performance Field Programmable Gate Array (FPGA) or multiple high-speed Digital Signal Processors (DSPs) to execute digital signal processing, consuming a large amount of electrical power. To realize an SDR mobile handset, it is necessary to reconcile the two contradictory requirements; high performance able to execute digital signal processing in real time, and low power consumption to allow battery operation. This paper presents the software radio implementation of a CDMA2000 1xEV-DO mobile handset on a single low-power- consumption DSP chip. By overcoming difficulties in multicore and multithread architecture, in parallel processing algorithm design, and in processing time restrictions, we have confirmed that our implementation has the ability to execute real-time signal processing up to 2.4 Mbps with a maximum data rate of lxEV-DO, and to communicate with a base station sending and receiving IP packets.