Architecture-conscious database systems
Anastassia Ailamaki, David J. DeWitt, Mark D. Hill · 2000
Database management systems (DBMSs) are currently used as the supporting back-end for a large number of internet applications, and are the dominant commercial software running on high-end enterprise servers. Although during the past two decades database performance research has primarily focused on optimizing I/O performance, today's applications are becoming increasingly computation and memory intensive. Recent studies show that the hardware behavior of database workloads is suboptimal when compared to scientific workloads, and the results indicate that further analysis is required to identify the real performance bottlenecks, mainly because memory latency is becoming slower relatively to processor speed. The primary contributions of this dissertation are (a) to introduce a novel approach towards identifying performance bottlenecks in database workloads by studying their hardware behavior, (b) to improve database performance by redesigning data placement in an architecture-conscious fashion, and (c) to identify hardware design details that mostly influence database performance. The results from the analysis in the first part show that more than half the execution time is spent on stalls, and most of them are due to memory accesses. To alleviate the data-related memory stalls, the second part of this dissertation introduces and evaluates Partition Attributes Across (PAX), a new layout for data records. When compared to the scheme used in today's commercial DBMSs, PAX incurs 50–75% less data-related stalls, and is 11%–42% faster when executing TPC-H queries. Finally, the third part of this dissertation studies the impact of processor design on the performance of database workloads on a variety of hardware platforms. The study indicates that, barring any implementation difficulties, (a) an out-of-order processor would overlap stalls more aggressively, (b) a high-accuracy branch-prediction mechanism is critical to eliminate stall time, and (c) a non-inclusive cache hierarchy with large blocks will exploit spatial locality provided by techniques like PAX.