A prototyping system for verification and evaluation in hardware-software cosynthesis
Th. Benner, Rolf Ernst, Ingo Könenkamp, Patrick Johannes Schuler, Hanspeter Schaub · 2002
We present a system emulator for rapid prototyping of small embedded HW/SW-systems with hard timing constraints generated by a HW/SW cosynthesis system. It consists of a standard core processor and an application specific coprocessor, which is emulated by XILINX FPGAs. A byte slice architecture allows to emulate rather complex coprocessors. The system emulator supports the prototyping, debugging and time measurement in a comfortable way.