LPC speech I.C. using a 12-pole cascade digital filter
D. Vetter, J. Stork, K. Skoge, P. Ahrens · 2005
An LSI speech synthesizer based on a 12-pole digital filter is described. The filter is organized as a cascade of six second-order sections, implemented by time-multiplexing a single physical second-order section comprising two simple multipliers and two adder/substractors. Synthesis parameters enter asynchronously, and both analog and serial digital output are provided. We have used the chip in consumer items to synthesize speech at low bit rates (∼1000 bps) using parameters derived from linear prediction. We describe in some detail the analysis procedures and data compression techniques used in this application.