New test results of a 4 by 4 discrete-time cellular neural network chip
Hubert Harrer, Josef A. Nossek · 2003
An analog implementation of discrete-time cellular neural networks based on conductance multipliers and transconductance amplifiers is discussed. The circuit architecture takes advantage of differential currents suppressing DC disturbances. Measurement results that compare the fabrication tolerances between different cells on the chip and the offset of the single cells are given.>