A platform based bus-interleaved architecture for de-blocking filter in H.264/MPEG-4 AVC
Shih-Chien Chang, Wen-Hsiao Peng, Shih‐Hao Wang, Tihao Chiang · IEEE Transactions on Consumer Electronics · 2005
In this paper, we proposed a platform based bus-interleaved architecture for the de-blocking filter in H.264. Specifically, to efficiently use the bus bandwidth, we classify the filtering mode into 8 types and use an adaptive transmission scheme to avoid redundant data transfer. Moreover, to reduce the processing latency, we use a bus-interleaved architecture for conducting data transmission and parallel filtering. As compared to the state-of-the-art designs, our scheme offers 1.6x to 7x performance improvement. While clocking at 100 MHz, our design can support 2560/spl times/1280 @ 30 Hz processing throughput. The proposed design is suitable for low cost and real-time applications. Moreover, it can be easily applied in system-on-chip design.