An application of Verilog-A to modeling of back propagation algorithm in neural networks

Kitaru Suzuki, A. Nishio, Atsushi Kamo, T. Watanabe, Hideki Asai · 2002

This paper describes an application of the Verilog-A, which is a hardware description language for analog applications, to the modeling of neural networks. We attempt to simulate neural networks having a learning algorithm, which has not been designed with electronic circuits. The learning algorithm is modeled with Verilog-A and the suitable synaptic weights are solved by Verilog-A simulation.

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