VLSI design and implementation of a discrete cosine transform chip for video compression using high level synthesis tools
N. Subramani, Tokunbo Ogunfunmi · 2002
A new implementation for computing a Discrete Cosine Transform (DCT) is presented. A DCT chip is designed using a Hardware Description Language viz. Verilog. The DCT chip designed is based on algorithms which can be implemented using Distributed Arithmetic. The results of these parallel processes are then combined to obtain the DCT. This implementation enables evaluation of the algorithm in a functional or behavioral form. The netlist of the DCT chip is obtained using Cadence Synthesis tools.