Built-in self-test of FPGA interconnect
Charles E. Stroud, Sajith Wijesuriya, C. Hamilton, M. Abramovici · 2002
We introduce the first BIST approach for testing the programmable routing network in FPGAs. Our method detects opens in, and shorts among, wiring segments, and also faults affecting the programmable switches that configure the FPGA interconnect. As a result, the BIST technique provides complete testing of interconnect faults.